Project Description

The Automated Neural Network Emulator was my senior project at the University of Utah and is what I wrote my senior thesis about.  It was developed by myself and members of the Laboratory of Circuits and Systems (LCAS) at the University of Utah.

The goal of the Automated Neural Network Emulator was to develop a machine learning framework that is capable of quickly deploying and testing different neural networks onto an FPGA to simulate their performance if they were implemented onto an analog neural network accelerator.  In other words, the goal of this project was to simulate how the process, voltage, and temperature (PVT) variations that occur in analog neural network emulators impact their performance.

While this project currently only works on the Xilinx Zedboard FPGA, there are future plans by the LCAS to further generalize the system such that it can be run on any FPGA (within reason).

Code Repository

As this project is currently still under development at the LCAS, there is no public repository for this project.  That said, once the LCAS has finished development on this project and has deemed the final product ready to be published, a link to the Git repository will be made available.